Controlled Impedance PCB Manufacturer — ±5% TDR Every Lot
Riching PCB manufactures controlled impedance PCB on Rogers RO4350B, RO3003, RT5880 and FR4. ±10% standard, ±5% available with TDR measurement and report on every production lot. Min trace/space 2.5mil for tight RF routing. In-house plasma activation for PTFE materials. 7–10 day prototype. No MOQ.
Home » 50 ohm PCB manufacturer » Controlled Impedance PCB Manufacturer — ±5% TDR Every Lot
Table of Contents
±5%
TDR available
report per panel
2.5mil
min trace/space
advanced routing
In stock
RO4350B · RO3003
RT5880
7–10
day prototype
no MOQ
Impedance Tolerance Options
| Tolerance | Verification | Typical Application | Lead Time Impact |
|---|---|---|---|
| ±10% (standard) | Sample-based TDR | General RF, EW, satcom | No impact |
| ±5% (tight) | TDR every panel + report | Phased array, 77GHz radar | +1–2 days |
| ±5% + single-lot material | TDR per panel + lot certificate | Multi-panel phased array, AESA | Confirm on enquiry |
±10% impedance tolerance is standard for most RF and digital high-speed designs and is verified via sample-based TDR measurement. For applications where amplitude or phase consistency across an array matters — phased array PCB, 77GHz radar PCB, or Ka-band PCB — ±5% tolerance with TDR measurement and report on every panel is available. Specify on the stackup drawing.
What Affects Impedance — and How We Control It
| Factor | Affects Impedance By | Riching PCB Control |
|---|---|---|
| Dielectric thickness | Direct — thicker = higher Z0 (microstrip) | Production Dk certificate per lot |
| Trace width | Direct — narrower = higher Z0 | Etch compensation per copper weight |
| Copper weight | Indirect — thicker copper widens effective trace | Etch factor calibrated 0.5oz–2oz |
| Dielectric constant (Dk) | Direct — higher Dk = lower Z0 | Material lot Dk verified vs datasheet |
| Soldermask over trace | Adds ~2–5Ω depending on thickness | LSOG thickness controlled, factored in |
| Reference plane distance | Direct — stripline depends on both planes | Stackup drawing confirms plane symmetry |
Impedance is determined by trace geometry, dielectric properties and stackup — not just trace width. For the full calculation methodology and reference trace widths by material and copper weight, see 50Ω RF trace PCB design guide.
TDR Verification Process
- TDR test coupons placed on every production panel — not just first-article
- Measurement performed before shipment — out-of-spec panels are identified and addressed before delivery
- TDR report available on request — includes measured impedance per coupon location
- For PTFE materials, TDR follows the in-house plasma activationand lamination steps — see PTFE PCB manufacturer for the full process.
Materials Supporting Controlled Impedance
- Rogers RO4350B / RO4003C— in stock, ±10% standard, FR4-compatible process
- Rogers RO3003— in stock 0.127 / 0.254mm, ±5% available for Ka-band and 77GHz
- Rogers RT5880— in stock 6 thicknesses, lowest Df for wideband impedance stability
- FR4 — standard ±10%, digital high-speed and mixed-signal designs
Process Capabilities
- Min trace/space 3mil/3mil standard, 2.5mil/2.5mil advanced — tighter routing for impedance-critical designs
- Production Dk certificate provided per material lot
- Etch compensation calibrated per copper weight (0.5oz–2oz)
- Stackup drawing confirms symmetric/asymmetric stripline reference plane distances
- IPC Class 2 standard, Class 3 on request
How to Order
- WhatsApp: +86 13760473650
- Send: Gerber zip + NC drill + stackup drawing
- Specify: target impedance (e.g. 50Ω), tolerance (±10% or ±5%), reference layer/plane
- DFM review confirms trace width vs production Dk before fabrication: 4–8 hours
- No MOQ. From 1 board.
Controlled Impedance PCB Manufacturer — Shenzhen Direct Factory
±5% TDR Every Lot · RO4350B RO3003 RT5880 In Stock
2.5mil Min Trace · 7–10 Day Prototype · No MOQ
Send Gerber + stackup drawing. DFM review within 4–8 hours.
Specify target impedance, tolerance and reference layer.
DFM review within 4–8 hours
Request a PCB Quote
Upload your Gerber ZIP file and project requirements. Our engineering team will review your PCB material, stackup, impedance needs, surface finish, and production quantity before quoting.
Please prepare:
- Gerber files in ZIP format
- PCB material or stackup requirements
- Controlled impedance notes if available
- Prototype or batch production quantity
